Panel switch wiring

With both ends of CI tied high, there is no charge on CI. But when SI opens, CI (initially acting as a short) momentarily pulls pin 2 of Ul low, triggering the timed delay circle.At the beginning of the timing cycle, Ul produces a positive voltage at pin 3, which charges C4 to near the positive voltage at pin 3, which charges C4 to near the positive supply voltage.

Transistor Q1 is heavily biased on by R3, keeping its collector at near ground level. With Q1 on, SCRl`s gate is clamped to ground, holding it off. When the delay schema times out, pin 3 of Ul goes low and ties the positive end of C4 to ground. That turns Q1 off.When Q1 turns off, the voltage at the gate of SCR goes positive, turning on the SCR and sounding the alarm. The delay time is adjustable from just a few seconds (R6 set to its minimum resistance) to about one minute (R6 adjusted to its maximum resistance).